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/* Files to Include                                                           */
/******************************************************************************/

#include <htc.h>            /* HiTech General Includes */
#include "global.h"

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/* Configuration Bits                                                         */
/*                                                                            */
/******************************************************************************/
#ifndef _BOOTLOADER

#ifdef _18F14K50

#pragma config CPUDIV = NOCLKDIV, USBDIV = OFF
#pragma config FOSC = HS, PLLEN = ON, PCLKEN = ON, FCMEN = OFF, IESO = OFF
#pragma config PWRTEN = OFF, BOREN = OFF, BORV = 30
#pragma config WDTEN = OFF, WDTPS = 32768
#pragma config HFOFST = OFF, MCLRE = OFF
#pragma config DEBUG = OFF, STVREN = ON, XINST = OFF, LVP = OFF, BBSIZ = OFF
#pragma config CP0 = ON, CP1 = ON
#pragma config CPD = ON, CPB = ON
#pragma config WRT0 = ON, WRT1 = ON
#pragma config WRTB = ON, WRTC = ON, WRTD = ON
#pragma config EBTR0 = ON, EBTR1 = ON
#pragma config EBTRB = ON

#endif

//#ifdef _18F25J50
//
//#pragma config WDTEN = OFF          //WDT disabled (enabled by SWDTEN bit)
//#pragma config PLLDIV = 2           //Divide by 2 (8 MHz oscillator input)
//#pragma config STVREN = ON            //stack overflow/underflow reset enabled
//#pragma config XINST = OFF          //Extended instruction set disabled
//#pragma config CPUDIV = OSC1        //No CPU system clock divide
//#pragma config CP0 = OFF            //Program memory is not code-protected
//#pragma config OSC = INTOSCPLL
//#pragma config T1DIG = ON          //Sec Osc clock source may not be selected, unless T1OSCEN = 1
//#pragma config LPT1OSC = OFF        //high power Timer1 mode
//#pragma config FCMEN = OFF          //Fail-Safe Clock Monitor disabled
//#pragma config IESO = OFF           //Two-Speed Start-up disabled
//#pragma config WDTPS = 32768        //1:32768
//#pragma config DSWDTOSC = INTOSCREF //DSWDT uses INTOSC/INTRC as clock
//#pragma config RTCOSC = T1OSCREF    //RTCC uses T1OSC/T1CKI as clock
//#pragma config DSBOREN = OFF        //Zero-Power BOR disabled in Deep Sleep
//#pragma config DSWDTEN = OFF        //Disabled
//#pragma config DSWDTPS = 8192       //1:8,192 (8.5 seconds)
//#pragma config IOL1WAY = OFF        //IOLOCK bit can be set and cleared
//#pragma config MSSP7B_EN = MSK7     //7 Bit address masking
//#pragma config WPFP = PAGE_1        //Write Protect Program Flash Page 0
//#pragma config WPEND = PAGE_0       //Start protection at page 0
//#pragma config WPCFG = OFF          //Write/Erase last page protect Disabled
//#pragma config WPDIS = OFF          //WPFP[5:0], WPEND, and WPCFG bits ignored
//
//#endif



#endif //_BOOTLOADER